This invention relates generally to memories utilized to store electronic information.
When reading device data from phase change memory cells, a voltage is applied that may be lower than the threshold voltage, in one situation, and the current is measured in order to enable the determination of the device resistance. The measured device resistance determines the degree of crystallinity present in the phase change memory and, thus, the state of the data stored in the cell.
When reading a reset or higher resistance bit, if the read voltage is greater than the threshold voltage, the device may snap back to a much lower voltage and a much higher value of current may be measured due to the fact that the device is turned on. In such case it may be difficult to distinguish between the set or lower resistance and the reset states of the bit. A read scheme that forces voltage to read data has to ensure with margin that a voltage less than the threshold voltage is applied. Similarly, the same effect can be seen in systems that read device data by forcing a current.
Thus, there is a need for a way to read phase change memories that provides a higher margin.